FPGA Development in VHDL - Beyond the Basics
大小
516.1 MB
文件数
91
Info Hash:
695E369F482D8BBFDA78EACDC5FE9605E4FF2D28
收录时间
2025-12-22 22:58:15
更新时间
2025-12-22 22:58:15
文件列表 (91)
03.Working with Custom Data Types/09.Summary.srt
832 B
07.Testing Your Designs/05.Summary.srt
1.02 KB
04.Monitoring Signal States with Attributes/01.Overview.srt
1.04 KB
06.Constructing State Machines/07.Summary.srt
1.07 KB
07.Testing Your Designs/01.Overview.srt
1.07 KB
04.Monitoring Signal States with Attributes/06.Type Kind Attributes.srt
1.07 KB
06.Constructing State Machines/03.State Machine Types.srt
1.17 KB
03.Working with Custom Data Types/01.Overview.srt
1.24 KB
04.Monitoring Signal States with Attributes/02.What Are Attributes.srt
1.32 KB
06.Constructing State Machines/01.Overview.srt
1.32 KB
05.Keeping Code Organized with Subprograms and Packages/07.Summary.srt
1.35 KB
02.Developing for the FPGA/02.Module Overview.srt
1.46 KB
03.Working with Custom Data Types/04.Subtypes.srt
1.48 KB
05.Keeping Code Organized with Subprograms and Packages/01.Overview.srt
1.5 KB
02.Developing for the FPGA/08.Summary.srt
1.51 KB
04.Monitoring Signal States with Attributes/08.Summary.srt
1.63 KB
03.Working with Custom Data Types/05.Multidimensional Arrays.srt
1.8 KB
01.Course Overview/01.Course Overview.srt
1.91 KB
06.Constructing State Machines/02.What Is a State Machine.srt
2.16 KB
03.Working with Custom Data Types/06.Record Types.srt
2.58 KB
04.Monitoring Signal States with Attributes/05.Signal Kind Attributes.srt
2.65 KB
03.Working with Custom Data Types/07.Physical Types.srt
3.03 KB
02.Developing for the FPGA/06.High-level Synthesis.srt
3.11 KB
05.Keeping Code Organized with Subprograms and Packages/02.Design Unit Recap.srt
3.13 KB
02.Developing for the FPGA/01.Course Overview.srt
3.31 KB
04.Monitoring Signal States with Attributes/07.User-defined Attributes.srt
3.4 KB
05.Keeping Code Organized with Subprograms and Packages/04.Constants.srt
3.69 KB
02.Developing for the FPGA/03.VHDL Design Flow.srt
3.71 KB
02.Developing for the FPGA/04.Compilation Process.srt
4.17 KB
03.Working with Custom Data Types/02.Standard Data Types Recap.srt
5.03 KB
04.Monitoring Signal States with Attributes/03.Value Kind Attributes.srt
5.37 KB
03.Working with Custom Data Types/03.Arrays and Ranges.srt
6.74 KB
07.Testing Your Designs/02.Testing and Testbenches.srt
6.86 KB
05.Keeping Code Organized with Subprograms and Packages/03.Procedures.srt
8.27 KB
06.Constructing State Machines/06.State Encoding Styles.srt
8.62 KB
02.Developing for the FPGA/07.Demo - MATLAB HDL Coder.srt
9.11 KB
02.Developing for the FPGA/05.Demo - Compilation Report.srt
9.17 KB
07.Testing Your Designs/03.A Sample Testbench.srt
9.75 KB
06.Constructing State Machines/04.Demo - Traffic Lights (Moore).srt
10.73 KB
04.Monitoring Signal States with Attributes/04.Function Kind Attributes.srt
11.06 KB
07.Testing Your Designs/04.Testing with VUnit.srt
13.07 KB
05.Keeping Code Organized with Subprograms and Packages/05.Generics.srt
13.17 KB
05.Keeping Code Organized with Subprograms and Packages/06.Resolution Functions.srt
13.51 KB
06.Constructing State Machines/05.Demo - Combination Lock (Mealy).srt
17.42 KB
03.Working with Custom Data Types/08.Demo.srt
19.9 KB
fpga-vhdl-beyond-basics.zip
839.72 KB
07.Testing Your Designs/01.Overview.mp4
1.08 MB
04.Monitoring Signal States with Attributes/01.Overview.mp4
1.13 MB
07.Testing Your Designs/05.Summary.mp4
1.14 MB
03.Working with Custom Data Types/09.Summary.mp4
1.19 MB
06.Constructing State Machines/03.State Machine Types.mp4
1.25 MB
06.Constructing State Machines/01.Overview.mp4
1.33 MB
03.Working with Custom Data Types/01.Overview.mp4
1.33 MB
04.Monitoring Signal States with Attributes/02.What Are Attributes.mp4
1.36 MB
05.Keeping Code Organized with Subprograms and Packages/01.Overview.mp4
1.4 MB
04.Monitoring Signal States with Attributes/06.Type Kind Attributes.mp4
1.41 MB
02.Developing for the FPGA/02.Module Overview.mp4
1.5 MB
05.Keeping Code Organized with Subprograms and Packages/07.Summary.mp4
1.54 MB
06.Constructing State Machines/07.Summary.mp4
1.77 MB
02.Developing for the FPGA/08.Summary.mp4
1.91 MB
03.Working with Custom Data Types/05.Multidimensional Arrays.mp4
2.16 MB
03.Working with Custom Data Types/04.Subtypes.mp4
2.29 MB
04.Monitoring Signal States with Attributes/08.Summary.mp4
2.5 MB
06.Constructing State Machines/02.What Is a State Machine.mp4
2.68 MB
03.Working with Custom Data Types/06.Record Types.mp4
3.1 MB
02.Developing for the FPGA/01.Course Overview.mp4
3.46 MB
02.Developing for the FPGA/03.VHDL Design Flow.mp4
3.47 MB
01.Course Overview/01.Course Overview.mp4
3.64 MB
04.Monitoring Signal States with Attributes/05.Signal Kind Attributes.mp4
3.86 MB
03.Working with Custom Data Types/07.Physical Types.mp4
4.14 MB
02.Developing for the FPGA/06.High-level Synthesis.mp4
4.17 MB
05.Keeping Code Organized with Subprograms and Packages/02.Design Unit Recap.mp4
4.22 MB
04.Monitoring Signal States with Attributes/07.User-defined Attributes.mp4
4.32 MB
05.Keeping Code Organized with Subprograms and Packages/04.Constants.mp4
4.79 MB
02.Developing for the FPGA/04.Compilation Process.mp4
5.31 MB
03.Working with Custom Data Types/02.Standard Data Types Recap.mp4
6.24 MB
04.Monitoring Signal States with Attributes/03.Value Kind Attributes.mp4
7.17 MB
07.Testing Your Designs/02.Testing and Testbenches.mp4
7.7 MB
03.Working with Custom Data Types/03.Arrays and Ranges.mp4
10.35 MB
05.Keeping Code Organized with Subprograms and Packages/03.Procedures.mp4
10.39 MB
06.Constructing State Machines/06.State Encoding Styles.mp4
13.28 MB
04.Monitoring Signal States with Attributes/04.Function Kind Attributes.mp4
15.06 MB
02.Developing for the FPGA/07.Demo - MATLAB HDL Coder.mp4
22.38 MB
07.Testing Your Designs/03.A Sample Testbench.mp4
25.45 MB
02.Developing for the FPGA/05.Demo - Compilation Report.mp4
25.52 MB
07.Testing Your Designs/04.Testing with VUnit.mp4
29.41 MB
06.Constructing State Machines/04.Demo - Traffic Lights (Moore).mp4
39.59 MB
05.Keeping Code Organized with Subprograms and Packages/06.Resolution Functions.mp4
40.9 MB
05.Keeping Code Organized with Subprograms and Packages/05.Generics.mp4
48.03 MB
06.Constructing State Machines/05.Demo - Combination Lock (Mealy).mp4
59.91 MB
03.Working with Custom Data Types/08.Demo.mp4
80.23 MB